1. Field of the Invention
The present invention relates to an arrangement and in particular but not exclusively to an arrangement in an integrated circuit using replica paths.
2. Discussion of the Related Art
Reference is made to “Tunable Replica Circuits and Adaptive Voltage-Frequency Techniques for Dynamic Voltage, Temperature, and Aging Variation Tolerance” 2009 Symposium on VLSI Circuits Digest of Technical Papers, James Tschanz et al. This paper describes tunable replica circuits used in conjunction with error-detection sequentials, and dynamic voltage and frequency techniques to adapt to voltage and aging problems.
Known processor designs are arranged to have built in margins to ensure that the integrated circuit operates in the worst conditions. These margins are operating voltage margins and frequency margins. However these margins mean that when the integrated circuit is operating in more favorable conditions, the integrated circuit is not operating in an optimum manner. The margins mean that for some of the time the performance is reduced (speed of operation) and/or the integrated circuit is energy inefficient (the voltage is higher than it needs to be.)